1. Technical Field
This invention relates generally to an apparatus used in fabricating integrated circuits where a mask pattern is lithographically transferred onto a substrate such as a semiconductor wafer. More particularly, it relates to an apparatus and method for characterizing an lithography imaging tool and related photolithographic processes.
2. Background Art
Integrated circuits in semiconductor technology continue to decrease in size to increase the density of circuits and their switching speed. As the circuits grow more complex, so do the processes developed to manufacture them. Current lithography processes define patterns on the semiconductor wafer of one micron and even submicron dimensions. The topography, the variations in height on the substrate, over which these fine line circuits must be fabricated becomes an increasingly severe problem at submicron dimensions. The production of these highly integrated monolithic circuits typically involves the transfer of patterns from a lithographic mask onto a photoresist covered wafer through the use of optical, electron beam, ion beam or x-ray imaging tools. Due to resolution requirements of some fine line structures of the circuits, some process steps may only be accomplished through the use of electron beam, ion beam or x-ray lithography. On other levels the elements of the circuit may be relatively large, and hence, more suitable for optical lithography. On still other levels, different types of lithography tools may be used interchangeably. A typical semiconductor wafer lot may undergo ten or more imaging or photolithographic steps at different times in the manufacturing process upon different tools.
This situation creates a number of potential problems. As a variety of imaging tools may be used on successive levels of a semiconductor wafer, it becomes more difficult to assure good overlay registration and line widths between the various tools. To possess the capability of transferring a particular photolithography step from tool to tool in a separate photolithography process must be developed for each tool. Both the tool characteristics such as exposure time, resolution, depth of field, illumination, uniformity, and the photoresist process characteristics such as the best resist system, resist thickness, resist sensitivity, developer, resist contrast, development time and temperature, etc. will differ from tool to tool and level to level of the wafer. To complicate matters further, not only do photolithography tools of different types and from different manufacturers behave differently, but so do photolithography tools from the same manufacturer and of the same model, having small, but possibly catastrophic, differences in lens systems and radiation sources. As an advanced lithography tool can represent a multi-million dollar investment, the choice of a tool unsuitable for the lithography process can be an expensive mistake.
In the past, process engineers have generally used product type masks to determine whether a particular lithography tool can perform a particular lithography step and to develop the process for the particular level. However, the requirements of the product masks, e.g., functional circuits, do not produce circuit patterns which are ideally suited for testing lens systems. A product mask set is not designed to provide the lithography process engineer maximum information to diagnose which of the many possible variables caused the failure to adequately image the critical elements. The elements which are critical to manufacturing success are often scattered over the chip site, rather than uniformly distributed over the chip, creating a number of "blind spots" where it is difficult to determine that the lithography tool would accurately transfer a critical element in that position in the mask pattern onto the substrate. In addition to "blind spots", product masks generally have elements oriented in X- and Y-directions only. Many lens defects are difficult to identify without an additional angular element to help separate the X and Y contributions to the image transfer anomalies. Further, it is expensive to design product masks; it is possible that an engineer might wish to study a process for finer elements for future use than is required for the current integrated circuits, but could not have a mask in hand to do so.